Name: Strategies to Reduce Power during VLSI Circuit Testing
Brand: Subhadip Kundu
SKU: ID13025143
Availability: InStock

Strategies to Reduce Power during VLSI Circuit Testing

48.34 EUR 1% Off 49.00 EUR

Dieses Buch beleuchtet effiziente Strategien zur Minimierung von Dynamik- und Leckageenergie im Test digitaler VLSI-Schaltungen, bietet theoretische Grundlagen, praktische Algorithmen und Optimierungsbeispiele.

Marke: Subhadip Kundu

ISBN: 3659255203

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Gesponsert Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits

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48.34 EUR 49.00 EUR

16-06-2026 13:12:53

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Gesponsert Strategies to Reduce Power during VLSI Circuit Testing, Fachbücher

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16-06-2026 02:12:07

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Strategies to Reduce Power during VLSI Circuit Testing

Gesponsert Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits

Gesponsert Strategies to Reduce Power during VLSI Circuit Testing, Fachbücher

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Strategies to Reduce Power during VLSI Circuit Testing

Gesponsert Strategies to Reduce Power during VLSI Circuit Testing: Reduction of Dynamic and Leakage Power during Testing of Digital VLSI Circuits

Gesponsert Strategies to Reduce Power during VLSI Circuit Testing, Fachbücher

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